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Raghu has authored several peer-reviewed research papers in these areas published in venues such as ASPLOS, ISCA, and PLDI. Raghu’s research was recognized by IEEE Micro as one of twelve “Top Picks” in the field of Computer Architecture for 2017. He holds a Ph.D. in Computer Science from Stanford University.
Raghu has given several talks on the topic of reconfigurable dataflow architectures, most recently at Hot Chips 2021 describing the SambaNova Cardinal SN10 RDU architecture. He has served as a referee on committees of research conferences, co-authored a book chapter on Coarse-Grained Reconfigurable Architectures, and holds several patents on hardware and software for dataflow architectures.